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53012 sy 20120507-s00003 no.a2058-1/13 http://onsemi.com semiconductor components industries, llc, 2013 may, 2013 LV8827LFQA overview the LV8827LFQA is a pwm-type driver ic designed for 3-phase brushless motors. the rotational speed can be controlled by inputting the pwm pulse from the outside, and changing duty. the ic incorporates a latch-type constraint protection circuit. features ? i o max = 1.5a (built-in output tr) ? speed control and synchronous rectification using direct pwm input (supports 3.3v inputs) ? 1-hall fg output ? latch type constraint protection circuit (the latch is released by s/s and f/r.) ? forward/reverse switching circuit, hall bias pin ? power save circuit (power save in stop mode) ? current limiter circuit, low-voltage prot ection circuit, overheat protection circuit ? charge pump circuit, 5v regulator output. ? start/stop circuit (short brake when motor is to be stopped) specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit v cc max v cc pin 36 v supply voltage v g max v g pin 42 v output current i o max t 500ms *1 1.5 a allowable power dissipation pd max2 mounted on a circuit board.*2 1.35 w junction temperature tj max 150 c operating temperature topr -40 to +80 c storage temperature tstg -55 to +150 c *1 : tj cannot exceed tj max = 150 c *2 : specified circuit board : 40mm 50mm 0.8mm, glass epoxy (four-layer board) caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. bi-cmos ic for brushless motor drive pwm driver ic orderin g numbe r : ena2058 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LV8827LFQA no.a2058-2/13 allowable operating range at ta = 25 c parameter symbol conditions ratings unit supply voltage range v cc 8.0 to 35 v 5v constant voltage output current i reg 0 to -10 ma hb pin output current i hb 0 to -200 a fg pin applied voltage v fg 0 to 6 v fg pin output current i fg 0 to 10 ma electrical characteristics at ta = 25 c, v cc = 24v ratings parameter symbol conditions min typ max unit supply current 1 i cc 1 3.3 4.0 ma supply current 2 i cc 2 at stop 0.7 0.8 ma output block low-side output on resistance r on (l1) i o = 1.0a 0.47 0.65 high-side output on resistance r on (h1) i o = -1.0a 0.67 0.9 low-side output leak current i l (l) 50 a high-side output leak current i l (h) -50 a low-side diode forward voltage v d (l1) i d = -1.0a 1.0 1.2 v high-side diode forward voltage v d (h1) i d = 1.0a 1.1 1.3 v 5v constant-voltage output output voltage vreg i o = -5ma 4.8 5.1 5.4 v line regulation v (reg1) v cc = 8.0 to 35v, i o = -5ma 50 mv load regulation v (reg2) i o = -5m to -10ma 100 mv hall amplifier input bias current ib (ha) -2 a common-mode input voltage range 1 vicm1 when using hall elements 0.3 vreg-1.7 v common-mode input voltage range 2 vicm2 at one-si de input bias (hall ic application) 0 vreg v hall input sensitivity vhin sin wave 80 mvp-p hysteresis width v in (ha) 9 20 35 mv input voltage low high vslh 3 9 16 mv input voltage high low vshl -19 -11 -5 mv csd oscillator circuit high level output voltage v oh (csd) 2.7 3.0 3.3 v low level output voltage v ol (csd) 0.9 1.1 1.3 v amplitude v (csd) 1.6 1.9 2.2 vp-p external capacitor charge current ichg1 (csd) vchg1 = 2.0v -14 -11.5 -9 a external capacitor discharge current ichg2 (csd) vchg2 = 2.0v 9.5 12 14.5 a oscillation frequency f (csd) c = 0.022 f (design target value) 130 hz charge pump output (vg pin) output voltage vgout v cc +4.5 v cp1 pin output on resistance (high level) v oh (cp1) icp1 = -2ma 500 700 output on resistance (low level) v ol (cp1) icp1 = 2ma 350 500 charge pump frequency f (cp) 82 103 124 khz internal pwm frequency oscillation frequency f (pwm) 41 51.5 62 khz current limiter operation limiter voltage vrf 0.19 0.21 0.23 v continued on next page.
LV8827LFQA no.a2058-3/13 continued from preceding page. ratings parameter symbol conditions min typ max unit thermal shutdown operation thermal shutdown operation temperature tsd *design target value (junction temperature) 150 165 180 c hysteresis width tsd *design target value (junction temperature) 30 c hb pin output voltage vhb ihb = -100 a 3.4 3.6 3.8 v low-voltage protection (5v constant-voltage output detection) operation voltage vsd 3.95 4.15 4.35 v hysteresis width vsd 0.2 0.3 0.4 v fg pin (3fg pin) output on resistance vol (fg) ifg = 5ma 40 60 output leak current il (fg) v o = 5v 10 a s/s pin high level input voltage v ih (ss) 2.0 vreg v low level input voltage v il (ss) 0 1.0 v input open voltage v io (ss) vreg-2.2 vreg-2.0 vreg-1.8 v hysteresis width v is (ss) 0.25 0.33 0.4 v high level input current i ih (ss) v ss = vreg 45 60 75 a low level input current i il (ss) v ss = 0v -115 -90 -65 a pwmin pin recommended input frequency f (pwin) 0.5 60 khz high level input voltage v ih (pwin) 2.0 vreg v low level input voltage v il (pwin) 0 1.0 v input open voltage v io (pwin) vreg-2.2 vreg-2.0 vreg-1.8 v hysteresis width v is (pwin) 0.25 0.33 0.4 v high level input current i ih (pwin) vpwin = vreg 45 60 75 a low level input current i il (pwin) vpwin = 0v -115 -90 -65 a f/r pin high level input voltage v ih (fr) *design target value 2.0 vreg v low level input voltage v il (fr) *design target value 0 1.0 v input open voltage v io (fr) vreg-2.2 vreg-2.0 vreg-1.8 v hysteresis width v is (fr) *design target value 0.25 0.33 0.4 v high level input current i ih (fr) vf/r = vreg 45 60 75 a low level input current i il (fr) vf/r = 0v -115 -90 -65 a * : design target value and no measurement is made.
LV8827LFQA no.a2058-4/13 package dimensions unit : mm (typ) 3430 pin assignment 1 in3 - 2 in3 + 3 in2 - 4 in2 + 5 in1 - 6 in1 + 18 pgnd 17 rf 16 out2 15 out3 14 out1 13 vg 24 hb 23 pwmin 22 csd 21 f/r 20 fg 19 s/s 7 sgnd 8 vreg 9 cp2 10 cp1 11 v cc 1 12 v cc 2 pd max - ta 0 0.76 1.35 1 1.5 0.5 2 --40 --20 80 60 20 40 0 100 ambient temperature, ta -- c allowable power dissipation, pd max -- w specified board : 40 50 0.8mm 3 glass epoxy (four-layer board) sanyo : vqfn24n(4.0x4.0) 4.0 4.0 0.8 max top view side view side view bottom view (2.5) (2.5) 0.4 0.25 1 24 12 2 (0.75) 0.5 0.035
LV8827LFQA no.a2058-5/13 three-phase logic truth table (in = ?high? indicates the state where in+ > in-.) ("h" = source, "l" = sink, and "m" = output off are shown with out1 to 3.) f/r = ? h ? f/r = ? l ? output in1 in2 in3 in1 in2 in3 out1 out2 out3 h l h l h l l h m h l l l h h l m h h h l l l h m l h l h l h l h h l m l h h h l l h m l l l h h h l m h l fg output in1 in2 in3 fg h l h l h l l l h h l l l h l h l h h h l l h h s/s pin, pwmin pin input state s/s pin pwmin pin high or open stop (short brake) output off low start output on csd function when the s/s pin is in a stop state protection released and count reset (initial reset) when the f/r pin is switched protection released and count reset when 0% duty is detected at the pwmin pin input protection released and count reset when low-voltage condition is detected protection released and count reset (initial reset) when tsd condition is detected stop counting
LV8827LFQA no.a2058-6/13 internal equivalent circuit and sa mple external component circuit csd osc csd control circuit mosc lda 3fg fg hall hys amp fg fg output f/r f/r f/r input pwmin pwmin pwmin input s/s s/s s/s input + hb tsd driver hb in3 - in3 + in2 - in2 + in1 - in1 + v cc pgnd out3 out2 out1 cp2 cp1 vg v cc 2 v cc 1 vreg v cc sgnd rf curr lim lvsd vreg charge pump
LV8827LFQA no.a2058-7/13 pin functions pin no. pin name pin function equivalent circuit 1 2 3 4 5 6 in3 - in3 + in2 - in2 + in1 - in1 + hall input pin. ? high when in + > in - . low in reverse relationship. the input amplitude of over 100mvp-p (differential) is desirable in the hall inputs. insert a capacitor between the in + and in - pins if the noise on the hall signal is a problem. vreg 500 5 3 1 500 6 4 2 7 sgnd control circuit block ground pin. 8 vreg 5v regulator output pin (control circuit power supply). insert a capacitor between this pin and ground for stabilization. about 0.1 f is necessary. (refer to 11 pages ?5 is low-voltage protection circuit.", 12 pages ?10 is vreg stabilization.?) v cc 50 8 9 10 cp2 cp1 charge pump capacitor connection pin. insert capacitor between cp1 and cp2. 11 12 v cc 1 v cc 2 for control (pin 11) and for output (pin 12) power pin. insert a capacitor between this pin and ground to prevent the influence of noise, etc. (refer to 12 pages ?9 is power supply stabilization.") 13 vg charge pump output pin. (upper-side fet gate power supply) insert a capacitor between this pin and v cc . (refer to 12 pages ?11 is charge pump circuit.") v cc 300 200 cp cg 10 13 9 continued on next page.
LV8827LFQA no.a2058-8/13 continued from preceding page. pin no. pin name pin function equivalent circuit 14 15 16 out1 out3 out2 output pin. pwm is controlled by the upper-side fet. v cc 14 15 16 17 17 rf output current detection pin. insert a low resistance resistor (rf) between this pin and ground. (refer to 10 pages ?2 is current limiter circuit.") vreg 5k 17 18 pgnd out circuit block ground pin. 19 s/s pin to select the start/stop type. stop = high or open start = low (refer to 12 pages ?8 is power saving circuit.") vreg 5k 50k 75k 19 20 fg 1-hall fg signal output pin. open drain output. 20 vreg continued on next page.
LV8827LFQA no.a2058-9/13 continued from preceding page. pin no. pin name pin function equivalent circuit 21 f/r pin to select the forward/reverse type. this pin goes to the high level when open. vreg 5k 50k 75k 21 22 csd pin to set the constraint protection circuit operating time and initial reset pulse. insert a capacitor between this pin and ground. insert a resistor in parallel with the capacitor if the protection circuit is not to be used. (refer to 10 pages ?4 is constraint protection circuit.") 500 22 vreg 23 pwmin external pwm input pin. apply an external pwm input signal to this pin. (input frequency range is from 0.5 to 60khz.) pwm on = low pwm off = high or open (refer to 10 pages ?3 is speed control method.") 23 vreg 5k 50k 75k 24 hb hall bias pin (3.6v output). connect an npn transistor. (refer to 11 pages ?7 hall input signal.") vreg 300 250 24
LV8827LFQA no.a2058-10/13 description of LV8827LFQA 1. output drive circuit this ic adopts a direct pwm drive method to reduce power loss in the output. it regulates the drive force of the motor by changing the output on duty. the output pwm switching is performed by the upper-side output transistor. the current regeneration route during the normal pwmoff passes through the parasitic diode of the output dmos. this ic performs synchronous rectification, and is intended to reduce heat generation compared to diode regeneration. 2. current limiter circuit the current limiter circuit limits the ou tput current peak value to a leve l determined by the equation i = v rf /rf (v rf = 0.21v (typical), rf: current detection resistor). this circuit suppresses the output current by reducing the output on duty. the current limiter circuit has an operation delay (approx. 7 00ns) to detect reverse recovery current flowing in the diode due to the pwm operation, and prevent a malfunction of the current limiting operation. if the coil resistance of the motor is small, or the inductance is low, the current at st artup (the state in which there is no back electromotive force generated in the motor) will change rapidly. as a result, the operation delay may sometimes cause the current limiting operation to take place at a value above the set current. in such a case, it is necessary to se t the current li mit value while taking into consideration the incr ease in current due to the delay. * regarding the pwm frequency in the current limiter circuit the pwm frequency in the current limiter circuit is dete rmined by the internal reference oscillator, and is approximately 50khz. 3. speed control method pulses are input to the pwmin pin, and the output can be controlled by varying the duty cycle of these pulses. when a low-level input voltage is applied to the pwmin pin, the output at the pwm side (upper side) is set to on. when a high-level input voltage is applied to the pwmin pin, the output at the pwm side (upper side) is set to off. if it is necessary to input pulses using inverted logic, this can be done by adding an external transistor (npn). it is judged duty=0%, count reset and the hb pin output of the csd circuit become "l" when the input of the pwmin pin becomes "h" level during the fixed time, and it enters the state of a short brake. 4. constraint protection circuit the LV8827LFQA includes a constraint protection circuit for protecting the ic and the motor in a motor constraint mode. this circuit operates when the motor is in an operation condition and the hall signal does not switch over for a certain period. note that while this constraint protection is operating, the upper-side output transistor will be off. time setting is performed according to the capacitance of the capacitor connected to the csd pin. set time (s) 90 c ( f) when a 0.022 f capacitor is connected, the protectio n time becomes approximately 2.0 seconds. the set time must be selected to a value that provides adequate margin with respect to the motor startup time. conditions for releasing the constraint protection state: ? when the s/s pin is in a stop state protection released and count reset(initial reset) ? when the f/r pin is switched protection released and count reset ? when 0% duty is detected at the pwmin pin input protection released and count reset ? when low-voltage condition is detected protection released and count reset (initial reset) (? when tsd condition is detected stop counting) the csd pin also functions as the initial reset pulse generation pin. if it is connected to ground, the logic circuit will go into a reset state, preventing speed control from taking pl ace. consequently, when not using constraint protection, connect a resistor of approximately 220k and a capacitor of about 4700pf in parallel to ground. 5. low-voltage protection circuit the LV8827LFQA incorporates a comparator that uses the band gap voltage as the reference. the circuit monitors the voltage at the vreg pin (5v) while the s/s pin is low and activates the protection circuit when the voltage at the vreg pin falls below 4.15v (typ.). when this happens, the state of the output transistors for all phases, and the short brake (bottom side is short) mode is established. source side: all off. synchronous rectification is not performed. sink side: all on. furthermore, when the vreg voltage falls even further and th e internal circuit can no long er operate properly, all the
LV8827LFQA no.a2058-11/13 output transistors are set to off. in order to ensure that the ic does not exhibit any unstable behavior when the vreg voltage has increased or decreased around 4.15v, a hysteresis of 0.3v (typ.) is provided. as a result, when the vreg voltage recovers to 4.45v (typ.) after the low-voltage protection circuit has been activat ed, all output transistors return to their operating state. 6. thermal shutdown circuit when the ic junction temperature exceeds 165c (design target value), the therma l shutdown circuit is activated, and all the output transistors are set to off. when the ic junction temperature goes below the hysteresis te mperature of 30c (design target value) or more, all the output transistors return to their operating state. however, as the thermal shutdown circuit is activated onl y when the junction temperature of the ic has exceeded the rating, its activation does not constitute a guarantee that the produ ct that incorporates this circuit will be protected from damage or destruction. 7. hall input signal a pulse input with the amplitude in excess of the hyster esis (35mv maximum) is required for the hall inputs. it is desirable that the amplitude of the hall input signal be 100mvp-p or more in consideration of the effect of noise and phase displacement. if disturbances to the output waveform (during phase switc hing) occur due to noise, co nnect a capacitor between the hall input pins to prevent such disturbances. in the constrai nt protection circuit, the hall input is utilized as a judgment signal. although the circuit ignores a cert ain amount of noise, caution is necessary. if all three phases of the hall input sign al go to the same input state (hhh or lll), the outputs are all set to the off state. if the hall ic is used, fixing one side of the inputs (either the + or ? side) at a voltage within the common-mode input voltage range (between 0.3v and vreg-1.7v) allows the other input side to be used as an input over the 0v to vreg range. method of connecting hall elements type (1) connection (three hall elements connected in series) advantages ? because the current flowing in hall elements can be shared by connecting the hall elements in seri es, the current consumption is less than that of a parallel-connected arrangement. ? the use of a current limiting resistor can be eliminated. ? fluctuations of amplitude with temperature are reduced. disadvantages ? because only 1v can be applied to one hall device, there is a possibility that adequate amplitude cannot be obtained. ? the current flowing in the hall elements varies with temperature. ? hall element unevenness (input resi stance in particular) is easy to influence the amplitude. type (2) connection (three hall el ements connected in parallel) advantages ? the current flowing in the hall elements can be determined by the current limiting resistor. ? the voltage applied to the hall elements can be varied, enabling adequate amplitude to be obtained. disadvantages ? because it is necessary to supply current separately to each hall element, the current consumption becomes large. ? a current limiting resistor is necessary. ? the amplitude varies with temperature. v cc hb 3v constant-voltage output v cc hb 3v constant-voltage output (1) (2)
LV8827LFQA no.a2058-12/13 hb pin the hb pin is used for cutting off the current flowing in the hall elements during standby (for saving electricity). the output from the hb pin is set to off in the following cases. ? when the s/s pin is in a stop state ? when 0% duty is detected at the pwmin pin input 8. power saving circu it (start/stop circuit) to save power when the LV8827LFQA is in the stop state, most of the circuit is stopped, aiming at reducing current consumption. if the hall bias pin is used, the current co nsumption in the power-saving mode will be approximately 700 a. even in the power-saving mode, a 5v regulator voltage is output. also, in the power-saving mode, the ic is in a short break state. (lower-side shorted) 9. power supply stabilization this ic generates a large output current, and employs a sw itching drive method, so the power supply line level can be disturbed easily. for this reason, it is necessary to connect a capacitor (electrolytic) of sufficient capacitance between the v cc pin and ground to ensure a stable voltage. connect the ground side of the capacitor to the pgnd pin, which is the power ground, as close as possible to the pin. if it is not possible to c onnect a capacitor of sufficiently large capacitance close to the pin, connect a ceramic capacitor of approximately 0.1 f to the vicinity of the pin. if diodes are inserted in the power s upply line to prevent ic destruction resulting from reverse-connecting the power supply, the power supply lines are even more easily disrupted. and even larger capacitor is required. 10. vreg stabilization to stabilize the vreg voltage, which is the power supply for the control circuit, connect a capacitor of 0.1 f or larger. connect the ground of this capacitor as close as possible to the control block ground (sgnd pin) of the ic. 11. charge pump circuit the voltage is stepped-up by the charge pump circuit, causing the gate voltage of the upper-side output fet to be generated. the voltage is stepped-up by capacitor cp connected between pins cp1 and cp2, causing charge to accumulate in capacitor cg conn ected between pins vg and v cc . the capacitance of cp and cg must always satisfy the following relationship. cg 4 cp charging and discharging of capacitor cp take place based on a frequenc y of 100khz. when the capacitance of capacitor cp is large, the current supply capability of power supply vg will increase. howe ver, if the capacitance is too large, the charging and discharging operations will be in sufficient. the larger the capacitance of capacitor cg, the more stable voltage vg will become. however, if the capac itance is made too large, the period during which voltage vg is generated when the power is switched on will become long, so caution is necessary. the capacitance settings of cp and cg should be the following. cp = 0.01 f cg = 0.1 f 12. difference point of LV8827LFQA and lv8829lfqa this difference that ic is the more fo llowing compared with lv8829lfqa exists. LV8827LFQA lv8829lfqa when duty=0% of pwm input is detected short brake synchronous rectification off (free run) at the low frequency number of pwm input (about 7.5khz under) like synchronous rectification on synchronous rectification off at low on duty of the pwm input (ex. frequency: 20khz, on duty: 3% under) like synchronous rectification on synchronous rectification off backflow current detecting function non it is. (at detection -> synchronous rectification off) 13. metal part at the rear of the ic the metal part at the rear of the ic (exposed die-pad) constitutes the sub ground of the ic, so connect it to the control ground (sgnd pin) and power ground pin (pgnd) at points close to the ic.
LV8827LFQA ps no.a2058-13/13 14. notes on using the ic this ic performs synchronous rectification in order to achieve high-efficiency drive. the synchronous rectification operation reduces the output transistor loss so it has the effect of reducing heat generation and improving efficiency. however, the synchronous rectification operation may cause the supply voltage to rise depending on the conditions under which the ic is used, such as: - when the output duty ratio has suddenly decreased - when the pwm input frequency is low, etc. protective measures must be taken to en sure that the maximum ratings are not exceeded even when the supply voltage has risen. these measures include: - appropriate selection of the capac itance of the capacitor inserted betw een the power supply and the ground - insertion of a zener diode between the power supply and the ground on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.

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